AI Decision System
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A fast, practical SystemVerilog LSP for RTL coding.
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A fast, practical SystemVerilog LSP for RTL coding. LazyVerilog is a SystemVerilog LSP written in C++ with neovim and vscode support. It provides formatting, linting, navigation, hover, completion, inlay hints, and RTL code actions for real SystemVerilog projects. If LazyVerilog saves you time, a ⭐ helps other RTL engineers find it. Comparison of LazyVerilog and the two most commonly used open-source SystemVerilog LSP: verible and svlangserver. ⚠️ means partial or experimental.README 전문 보기 ↗
Comparison of LazyVerilog and the two most commonly used open-source SystemVerilog LSP:
verible
and svlangserver.
| ⚡ LazyVerilog | Verible LS | svlangserver | |
|---|---|---|---|
| UVM, classes, packages | ✅ | ⚠️ | ❌ |
| Runtime | C++ | C++ | Node.js |
| Parser | slang | Verible | own indexer |
| Diagnostics | parse, lint, semantic | parse, lint | Verilator |
| Formatting | ✅ | ✅ | via Verible |
| Go to definition | ✅ | ✅ | ✅ |
| Find references | ✅ | ✅ | ❌ |
| Rename | ✅ | ❌ | ❌ |
| Hover | ✅ | ⚠️ | ✅ |
| Completion | ✅ | ❌ | ✅ |
| Signature help | ✅ | ❌ | ✅ |
| Inlay hints | ✅ | ❌ | ❌ |
| Symbols | ✅ | ✅ | ✅ |
| Lint autofix | ⚠️ | ✅ | ❌ |
| RTL code generation | ✅ | ❌ | ❌ |
| RTL hierarchy view | ✅ | ❌ | ✅ |
| Interface and connect | ✅ | ❌ | ❌ |
⚠️ means partial or experimental.
What LazyVerilog currently supports:
| Feature | Status | Notes |
|---|---|---|
| Formatting | ✅ | Configurable via lazyverilog.toml |
| Lint diagnostics | ✅ | Parse diagnostics, optional semantic diagnostics, and configurable lint/style rules |
| Lint quick fixes | ⚠️ | Add a missing default, add an automatic lifetime |
| Go to definition | ✅ | Modules, instances, ports, named arguments, symbols, and macros |
| Find references | ✅ | Symbols and macros across open files and configured project files |
| Rename symbol | ✅ | Best-effort across project files |
| Hover | ✅ | Symbol details for modules, ports, signals, parameters, typedefs, subroutines, and macros |
| Completion | ✅ | Context-aware auto-completions |
| Signature help | ✅ | Functions and tasks |
| Inlay hints | ✅ | Port directions on instantiation |
| Document symbols | ✅ | Outline of the current file |
| Workspace symbols | ✅ | Modules, interfaces, packages, classes and methods; functions, tasks and typedefs; pkg::name queries |
| RTL tree | ✅ | Module instantiation hierarchy |
| Auto-instantiation / Auto-wire / Auto-arg / Auto-function / Auto-FF | ✅ | Various Code Actions for RTL generation |
| Project-local config | ✅ | Full customization available by lazyverilog.toml at project root |
Installation, usage, and configuration for Neovim and VS Code: https://lazyverilog.github.io