開源,純 Rust + CUDA。已在 DGX Spark(GB10)上驗證,並在 AMD Strix Halo 上運行。已提交至 MLPerf 推論 v6.1。每個數字都是收據。
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Open source, pure Rust + CUDA. Verified on DGX Spark (GB10) and running on AMD Strix Halo. Submitted to MLPerf Inference v6.1. Every number is a receipt.
開發工具Rust · CudaGitHub @Atlas-Inf上線中營運者未確認
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一分鐘完成驗證Atlas Inference is a dependency free lightweight inference engine meant to run LLMs on YOUR compute seamlessly. Supports GB10 and Strix Halo at the moment, hoping to expand to more!
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Pure Rust & CUDA LLM Inference
Universal Inference At Unimaginable Speeds
Atlas is a high-performance, pure Rust & CUDA LLM inference engine purpose-built for prosumer workstations (NVIDIA DGX Spark / GB10 SM121 and AMD Strix Halo). No Python, no PyTorch, no bloated dependency trees—just one compact binary with hand-tuned micro-kernels.檢視完整 README ↗Atlas is a high-performance, pure Rust & CUDA LLM inference engine purpose-built for prosumer workstations (NVIDIA DGX Spark / GB10 SM121 and AMD Strix Halo). No Python, no PyTorch, no bloated dependency trees—just one compact binary with hand-tuned micro-kernels.
pread NVMe offloading.sparkrun run @atlas/<recipe>.Atlas began as a solution to a widely known problem with Python inference engines. The code was steeped in an ever-shifting ecosystem of dependencies, patches, and cross-dependencies. One day your workaround for running a model works. The next, you are updating to a nightly branch of several dependencies and injecting a new workaround. That is how you build a proof of concept, not a software ecosystem. Data scientists proved LLMs can revolutionize our world. Now software engineers turn the proof of concept into something designed to withstand the test of time. The main objective mirrors what llama.cpp proved for cheap GPUs. As hardware advances, nobody should have to pay premium Cloud API prices for inference. Atlas maximizes speed for each hardware and model combination so a meaningfully powerful local model is truly useful.
CONTRIBUTING.md.ModelWeightLoader, TransformerLayer, GpuBackend, CommBackend, StorageBackend, and the kernels/<hw>/<model>/<quant>/ directory convention.One multi-model binary. The right kernel set is selected at startup from the model's config.json, so there is no swapping images and no rebuilding. Point Atlas at a HuggingFace ID, or launch a verified recipe with sparkrun run @atlas/<recipe>. The recipe SSOT is sparkrun-recipes and the interactive browser lives at atlasinference.dev/#models.
Numbers are single-GB10 decode tok/s measured end-to-end through the HTTP API on a short prompt (max_tokens ≤ 30, temperature = 0.1), reproducible via scripts/sweep_all_models.sh.
| Model | HuggingFace ID | Params / active | Architecture | Recipe | tok/s |
|---|---|---|---|---|---|
| Qwen3.8-27B flagship | nvidia/Qwen3.8-27B-NVFP4 | 27B dense | GDN + attention hybrid, MTP | @atlas/qwen3.8-27b-nvfp4 | 23.59 |
| Qwen3.8-Flash-Next | RadixArk/Qwen3.8-Flash-Next-NVFP4 | ~180B MoE | GDN + attention + MoE, PLE NVMe streaming | @atlas/qwen3.8-flash-next-nvfp4 | 36.7 |
| Nemotron-3.5-Lightning + DSpark | nvidia checkpoint via recipe | 30B / 3B | Mamba-2 + attention + MoE + DSpark drafter | @atlas/nemotron-3.5-lightning-30b-a3b-nvfp4-dspark | sub-10ms/token |
| Nemotron-3.5-Super-VL + LiLiCorr | nvidia/NVIDIA-Nemotron-3.5-Super-VL-120B-A12B-NVFP4 | 120B / 12B | Mamba-2 + attention + LatentMoE, C-RADIO vision, LiLiCorr drafter (DFlash γ8) | @atlas/nemotron-3.5-super-vl-120b-a12b-nvfp4-dflash2 | 28 (γ8); also Strix Halo Windows/Linux |
| Qwen3.5-27B | Kbenkhaled/Qwen3.5-27B-NVFP4 | 27B dense | Hybrid SSM + attention, dense FFN, MRoPE | 13 | |
| Qwen3.5-35B-A3B | Sehyo/Qwen3.5-35B-A3B-NVFP4 | 35B / 3B | GDN + attention + MoE, MTP | 131 (MTP K=2) | |
| Qwen3.5-122B-A10B | Sehyo/Qwen3.5-122B-A10B-NVFP4 | 122B / 10B | GDN + attention + MoE, MTP | 46 (EP=2) | |
| Qwen3.6-35B-A3B | Qwen/Qwen3.6-35B-A3B-FP8 | 35B / 3B | GDN + attention + MoE, MRoPE, vision | @atlas/qwen3.6-35b-a3b-fp8-mtp | |
| Holo-3.1-35B-A3B | Hcompany/Holo-3.1-35B-A3B-NVFP4 |
Flagship and Flash-Next also ship -latency and -throughput recipe variants for single-stream latency and 1 to 128 stream concurrency. On Qwen3.5-35B-A3B with MTP speculative decoding, Atlas decodes faster than NVIDIA's own vLLM build on the same hardware, on numbers we can hand you the script for. If you reproduce a faster vLLM number, file an issue. We would rather be measured than congratulated. The kernel-by-kernel comparison against PyTorch eager lives in the benchmarks chapter.
And this is only the beginning. The plug-and-play design has already carried AMD into the garden, Apple Silicon and Intel are next, and next quarter's models will slot in the same way the Qwens did this quarter.
New to Atlas on a Spark? The GB10 Deployment & Compatibility Guide is the one page to read first. It covers which model and quant fit your box, what to do when it OOMs, the known gotchas, and what verified means, then hands you the exact recipe.
@atlas/qwen3.8-27b-nvfp4# Step 1, install sparkrun
pip install sparkrun # or uvx sparkrun setup install
# Step 2, download weights (or let sparkrun fetch automatically)
huggingface-cli download unsloth/Qwen3.8-27B-NVFP4 \
--local-dir ~/.cache/huggingface/hub/models--unsloth--Qwen3.8-27B-NVFP4
# Step 3, launch the flagship (port 8888)
sparkrun run @atlas/qwen3.8-27b-nvfp4 --hosts localhost
Prefer the one-line quickstart script?
curl -fsSL https://atlasinference.dev/quickstart.sh | sh
The other flagships work the same way. The recipe is the command.
# Nemotron 3.5 Lightning 30B + DSpark drafter, sub-10ms decode
export ATLAS_DFLASH_OPTION_B=1 ATLAS_NO_TOOL_INJECT=1
sparkrun run @atlas/nemotron-3.5-lightning-30b-a3b-nvfp4-dspark --hosts localhost
# Qwen 3.8 Flash-Next ~180B, streams the 47.7 GB PLE table off NVMe (~90 GB resident)
sparkrun run @atlas/qwen3.8-flash-next-nvfp4 --hosts localhost
Strix Halo is a unified-memory APU, so the validated path is the native binary built against ROCm with no container. Both legs merged into main via PR #8 (Linux) and PR #9 (Windows).
Linux (Ubuntu 24.04, ROCm 6.2+)
git clone https://github.com/Atlas-Inf/atlas.git
cd atlas
# Prerequisites — install Rust first (rust-toolchain.toml pins the version;
# distro-packaged rustc is too old), plus ROCm's hipcc + headers:
curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh -s -- -y
source "$HOME/.cargo/env"
sudo apt install rocm-hip-dev
./build-amd.sh # strix-hip backend, all targets, needs ROCm + cargo
./serve-amd.sh # nvidia/Qwen3.8-27B-NVFP4, validated config
./serve-amd.sh unsloth/Qwen3.8-27B-NVFP4 # or the preservation checkpoint
./build-amd.sh preflights hipcc, the HIP headers, and cargo and says what's
missing instead of failing 120 kernel compiles in (a hipcc with no dev headers
dies as 'hip/hip_runtime.h' file not found). If ROCm lives outside
/opt/rocm, point ATLAS_HIPCC and ATLAS_ROCM_HOME at it.
Defaults are the validated config. K=4 MTP speculative, the W4A8 DP4A decode arm, BF16 KV. NUM_DRAFTS=0 disables speculation, LM_HEAD=bf16 switches for the unsloth checkpoint's per-row-FP8 lm_head, and ATLAS_W4A16_DP4A=0 opts out of DP4A. The ATLAS_FP8_DEQUANT_* and ATLAS_GDN_BF16_WEIGHTS exports are baked in and required for unsloth.
Measured on a Ryzen AI Max+ 395 with Radeon 8060S under ROCm 7.13 at ~60 GB GTT. 28.3 to 28.6 tok/s K=4 decode, 13.3 to 13.6 tok/s at 30k context, and 83.02 / 80.41 on the 995-row bfcl-subset golden draw, matching the NVIDIA shipped reference (83.22 / 79.02). Details in BENCH.toml and amd-strix-halo-scale.md.
Windows (native HIP on Windows 11, no WSL, no container. spark.exe is MSVC-built and reaches the GPU through a CUDA to HIP shim over ROCm 10 / TheRock)
git clone https://github.com/Atlas-Inf/atlas.git
cd atlas
# Prerequisites — Rust via rustup (rust-toolchain.toml pins the version;
# do not use the Store/other distro rust), MSVC Desktop C++, and the
# ROCm SDK with HIP_PATH set:
winget install Rustlang.Rustup # or https://rustup.rs
hf download nvidia/Qwen3.8-27B-NVFP4 `
--local-dir "$env:USERPROFILE\models\nvidia-Qwen3.8-27B-NVFP4"
# Build from PowerShell, not Git Bash (bash puts coreutils link.exe ahead
# of MSVC's). Needs MSVC Desktop C++, the ROCm SDK (HIP_PATH), and cargo.
.\build-amd.ps1
# Serve, the fingerprinted fp8d recipe. Native FP8 GDN, K=4 MTP, BF16 KV
# and lm_head. Preflight hard-fails on non-gfx1151 GPUs.
.\serve-amd.ps1 # Qwen3.8 27B + MTP (default)
# .\serve-amd.ps1 -Spec dflash2 # 27B + DFlash2 — also needs:
# hf download incoai/Qwen3.8-27B-DFlash2 --local-dir "$env:USERPROFILE\models\dflash2"
# .\serve-amd.ps1 -Model qwen3.8-flash-next # Flash-Next + MTP — needs VGM 32 GB and:
# hf download nvidia/Qwen3.8-Flash-Next-NVFP4 --local-dir "$env:USERPROFILE\models\nvidia-Qwen3.8-Flash-Next-NVFP4"
.\build-amd.ps1 compiles every strix-hip target once; serve-amd.ps1 picks the model + speculation mode (-Model qwen3.8-flash-next -Spec dflash2 is rejected — no Flash-Next drafter exists). Add -Thinking off|on to pin --disable-thinking or make thinking the server default (issue #146; Linux twin: THINKING=off|on on serve-amd.sh).
Prebuilt instead? Unzip spark-windows-x86_64-amd-hip keeping every DLL beside spark.exe, set $env:ATLAS_BIN to it, and run .\serve-amd.ps1. That skips the toolchain check and the build; the prebuilt zip is built with every target too (.github/release-matrix.json row windows-x86_64-amd-hip has target_model: "*"), so the same -Model/-Spec options apply. The script runs a detached smoke probe (first_run_smoke.log), and the 64K-context record config is win_serve_qwen38_nvfp4.ps1.
Measured on a Framework Desktop (Ryzen AI Max+ 395, Radeon 8060S, Windows 11, ROCm 10.0.0 TheRock, Adrenalin 32.0.31041.1004). 83.32 / 78.70 on the bfcl-subset golden draw with zero faults in 3.6 hours, and 17.25 tok/s decode with MTP engaged at p1 0.834. Provenance in BENCH.toml and STRIX_WINDOWS_HIP.md.
Atlas speaks OpenAI, Anthropic, and Responses APIs on the same port. curl, the OpenAI SDK, Open WebUI, opencode, Cline, and Claude Code all work when pointed at the served port. sparkrun recipes default to 8888 and the AMD scripts default to 8081.
curl http://localhost:8888/v1/chat/completions \
-H "Content-Type: application/json" \
-d '{
"model": "atlas",
"messages": [{"role": "user", "content": "Explain quantum computing in three sentences."}],
"max_tokens": 256
}'
[email protected].Continuity notice. Atlas is continuing. This repository, the Atlas-Inf GitHub organization, and atlasinference.dev are the replacement official Atlas channels. The existing website and GitHub repository remain disputed Atlas assets that have not been relinquished.
| 35B / 3B |
| GDN + attention + 256-expert MoE, Qwen3-VL vision |
| Holo-3.1-0.8B | Hcompany/Holo-3.1-0.8B | 0.8B dense | GDN + attention + dense FFN, Qwen3-VL vision |
| Ornith-1.0-9B | deepreinforce-ai/Ornith-1.0-9B | 9B dense | GDN + attention + dense FFN, Qwen3-VL vision, MRoPE |
| Qwen3-Next-80B-A3B | nvidia/Qwen3-Next-80B-A3B-Instruct-NVFP4 | 80B / 3B | SSM + attention + MoE | 74 |
| Qwen3-VL-30B-A3B | ig1/Qwen3-VL-30B-A3B-Instruct-NVFP4 | 30B / 3B | Vision + attention + MoE | 97 |
| Gemma-4-26B-A4B | bg-digitalservices/Gemma-4-26B-A4B-it-NVFP4A16 | 26B / 4B | Attention + MoE, GeGLU | @atlas/gemma-4-26b-a4b-nvfp4 | 67 |
| Gemma-4-31B | nvidia/Gemma-4-31B-IT-NVFP4 | 31B dense | Attention (sliding + full), GeGLU | 9 |
| Mistral-Small-4-119B | mistralai/Mistral-Small-4-119B-2603-NVFP4 | 119B / 6.5B | Attention + MoE | 33 |
| MiniMax-M2.7 | lukealonso/MiniMax-M2.7-NVFP4 | 229B / ~10B | Attention + 256-expert MoE + MTP |
| Nemotron-3-Nano-30B-A3B | nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-NVFP4 | 30B / 3B | Mamba-2 + attention + MoE | @atlas/nemotron-3-nano-30b-a3b-nvfp4 | 88 |
| Nemotron-3-Super-120B-A12B | nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4 | 120B / 12B | Mamba-2 + attention + MoE | @atlas/nemotron-3-super-120b-a12b-nvfp4 | 24 |
| DeepSeek-V4-Flash | via recipe | Attention + MoE | @atlas/deepseek-v4-flash-nvfp4-ep2 | EP=2, 2 Sparks |